From 32efd4529aba776eca9456e96656d542267874f3 Mon Sep 17 00:00:00 2001 From: Justin Luth Date: Wed, 30 Oct 2019 11:11:45 +0300 Subject: tdf#128447 sc/vml: accept xml prolog ... or processing instruction, or text directive. The inability to parse this was exposed in LO 6.2 with commit 2cae2ecfef47d8dd10647c10f9577392c1887d3a I added to the top of vmlDrawing1.vml from the unit test, which invalidates the entire .vml file and the two controls are lost without this fix. Change-Id: Ia1e6d5f9bb932756f70dca59fa8b32004c9e8013 Reviewed-on: https://gerrit.libreoffice.org/81730 Reviewed-by: Michael Stahl Tested-by: Jenkins --- oox/source/vml/vmlinputstream.cxx | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'oox/source/vml/vmlinputstream.cxx') diff --git a/oox/source/vml/vmlinputstream.cxx b/oox/source/vml/vmlinputstream.cxx index 215eff35f621..2fc17ee84ea7 100644 --- a/oox/source/vml/vmlinputstream.cxx +++ b/oox/source/vml/vmlinputstream.cxx @@ -169,6 +169,12 @@ void lclProcessElement( OStringBuffer& rBuffer, const OString& rElement ) // do nothing } + // just append any xml prolog (text directive) or processing instructions: + else if( (nElementLen >= 4) && (pcOpen[ 1 ] == '?') && (pcClose[ -1 ] == '?') ) + { + rBuffer.append( rElement ); + } + // replace '
' element with newline else if( (nElementLen >= 4) && (pcOpen[ 1 ] == 'b') && (pcOpen[ 2 ] == 'r') && (lclFindNonWhiteSpace( pcOpen + 3, pcClose ) == pcClose) ) { -- cgit